2026/6/16
Sohrab Majidifar

Sohrab Majidifar

Academic rank: Assistant Professor
ORCID:
Education: PhD.
H-Index:
Faculty: Faculty ofٍٍ Electrical Engineering
ScholarId:
E-mail: sohrab.majidi [at] gmail.com
ScopusId:
Phone: 1105
ResearchGate:

Research

Title
Autaptic Self-Feedback for FPGA Realization and Real-Time Monitoring of Epileptic-Like Synchrony in Cubic–Quadratic Neuron Networks
Type
JournalPaper
Keywords
Autapses , Cubic-Quadratic (C-Q) neuron model , neural networks , epileptic-like synchrony , field-programmable gate array (FPGA) , real-time monitoring , neural synchronization
Year
2026
Journal IEEE Transactions on Circuits and Systems I: Regular Papers
DOI
Researchers Saeed haghiri ، Mohsen Hayati ، Sohrab Majidifar

Abstract

Autapses, functioning as self-feedback loops, play a decisive role in modulating neuronal excitability and synchrony. In this work, we examine how autaptic feedback influences neural dynamics both at the level of single neurons and within larger networks. Employing the Cubic–Quadratic (C–Q) neuron model, our results show that inhibitory autapses disperse spike timings and effectively suppress seizure-like alignment. In a fully connected network of N=100 neurons with conditional autapses, inhibitory feedback reduces the mean synchrony index from ⟨S⟩≈0.216 (no autapse) to ⟨S⟩≈0.009 under strong inhibition ( Kautapse=−30 ), whereas excitatory autapses drive the system toward near-perfect synchrony ( ⟨S⟩≈0.89 ). These findings demonstrate that autapses serve as state-dependent modulators that prevent hyper-synchronization. To support real-time observation of large-scale networks, we introduce an optimized C–Q formulation where cubic and quadratic nonlinearities are approximated using cosine-based quantized functions. This strategy yields extremely low approximation error (NRMSE <0.005, R≈1 ) while eliminating multipliers, thereby enhancing hardware efficiency. The approach is implemented on a Xilinx Virtex-7 FPGA with a time-multiplexed 100-neuron design, operating at 380 MHz, utilizing about 30% of LUT resources, and consuming 2.2 W of power. The platform enables accurate real-time logging of epileptic-like network activity and provides an scalable solution for synchronization monitoring. Overall, we demonstrate a circuit-centric, autapse-integrated FPGA platform that realizes real-time, on-chip monitoring of a fully connected 100-neuron C–Q network. By embedding conditional autaptic feedback in hardware, the proposed architecture enables adjustable suppression of epileptic-like hypersynchrony when synchrony exceeds a threshold, providing a practical foundation for closed-loop prevention of excessive synchronization.