May 3, 2024
Abdulhamid Zahedi

Abdulhamid Zahedi

Academic rank: Assistant professor
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Education: Ph.D in Electrical Engineering-Communication Systems
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Faculty: Faculty ofٍٍ Electrical Engineering

Research

Title
Field-programmable gate arrays-based Morris-Lecar implementation using multiplierless digital approach and new divider-exponential modules
Type Article
Keywords
DBML ; spiking neural networks; Morris-Lecar (ML) model
Researchers ahmad ghiasi، Abdulhamid Zahedi

Abstract

Simulation, modeling, and hardware implementation of different parts of central nervous system (CNS) are very attractive research areas in terms of neuromorphic engineering aspects. Considering the neuronal parts of the human brain, the hardware implementation of neural models of spiking neural networks should be evaluated from preparing a simple efficient model and optimal hardware implementation. In this paper, Morris-Lecar (ML) model as a biological neuronal model with nonlinear differential equations and hyperbolic functions is discussed. This original model with non-linear complex functions needs high-computational high-cost hardware implementation on Field-Programmable Gate Arrays (FPGA). This paper presents a new divider module and exponential term (2X) to provide low-cost and high-speed implementation of original ML called Division-Based ML (DBML). DBML model suggests simpler equations using division-based exponential terms, logical shifts and simple arithmetic operations. Thus, high-performance neuronal design is presented following original ML model in terms of time domain and different dynamic behaviors.